NOTE: If you want to view Papers or Slides you must allow pop-ups for this site.

 Session Numbers
1 Verification Methodology: Formal & Emulator
1SW What Makes a Good Code Coverage Tool for HLS?
1T Portable Test and Stimulus: The Next Level of Verification Productivity is Here
2 State Based Reference Model Innovation and Dynamic Configurable Testbench in SOC
2SW The Big Data Revolution Beautiful Servant or Dangerous Monster?
2T Leveraging Virtual Prototypes from Concept to Silicon
3 Memory Design and Verification
3SW Using Mutation Coverage For Advanced Bug Hunting with Formal
3T How to Stay Out of the News with ISO26262-Compliant Verification
4 Performance & Efficiency
4SW Smart Verification: New Approach for FPGA Prototyping - Fast and Easy
4T Synopsys FPGA Platform – Enabling Significant Productivity Gains in Design, Verification and Debug of FPGA-based Designs
5 Poster Session