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 Session Numbers
1 Formal Verification
1SW Short Workshop: Effective Verification of RISC-V Cores and SoCs
1T Tutorial: System Level Flows for SoC Architecture Analysis and Design
2 Design & Functional Safety
2SW Short Workshop: Shift-Left Verification of Digital and Mixed-Signal Designs using MATLAB
2T Tutorial: Using Verification Continuum Platform to Speed PCIe System Verification
3SW Short Workshop: Leveraging Virtual Realization to Make Portable Stimulus UVM/SDV Scenarios Portable
3T Tutorial: Simulation Acceleration to Speed Block and Platform Level IP Verification
4 ESL & Virtual Prototyping
4SW Short Workshop: Applying Design Patterns to Maximize Verification Reuse @Block, Subsystem and System-on-Chip Level
4T Tutorial: Next Gen System Design and Verification for Transportation
5 Formal Verification
6 Analog/AMS
8 Portable Stimulus
9T Tutorial: PSS: From (a Brilliant) Idea to a Winning Formula
10 Machine Learning & Automation
10T Tutorial: Modern SystemC
12 Low Power
13 Poster Session