THURSDAY March 01, 8:30am - 10:00am | Sierra
KEYWORD: VERIFICATION PRODUCTIVITY METHODS
EVENT TYPE: SHORT WORKSHOP

SESSION 1SW
Deep Learning for Design and Verification Engineers
Speaker:
John Aynsley - Doulos
Organizer:
John Aynsley - Doulos
Deep learning is a very hot topic right now. The success of deep learning algorithms in the ImageNet Large Scale Visual Recognition Challenge (ILSVRC) has brought deep learning to everyone’s attention. Although deep learning does of course get over-hyped, its effectiveness in the wider context of machine learning and data science is undeniable. Deep learning algorithms are proving effective in many existing applications such as image recognition, speech recognition, and natural language processing. Deep learning algorithms are opening the door to many totally novel applications and products, from smart homes to autonomous vehicles, from defense systems to medical systems. Deep learning will impact D&V engineers in a number of ways, from the kinds of electronic product we design and verify through to the algorithms used within design and verification tools. Last year we saw machine learning papers starting to appear at DVCon. This workshop gives a basic introduction to the subject of deep learning specifically aimed at the interests and the skill set of the design and verification engineers who comprise the DVCon audience. The workshop explains the background to deep learning, the technical jargon, and the main concepts you need to get started. Topics to be covered include basic machine learning algorithms for regression and classification, cost functions, basic neural network models, the distinction between machine learning and deep learning, the training and deployment of neural network models, an overview of the ecosystem including common deep learning software libraries and frameworks, and how to get started with deep learning. The workshop includes access to working code examples and instruction on how to run them yourself.

Thank You to Our Sponsor: