Archive

NOTE: If you want to view Papers or Slides you must allow pop-ups for this site.

TUESDAY February 28, 2012, 10:30 AM - 11:00 AM


ARCHIVED SESSION 1P
Poster Session 1 - Coffee Break
Moderator: Shankar Hemmady - Synopsys, Inc.



1P.1SystemVerilog Checkers: Key Building Blocks for Verification IP
 
 Speaker: Erik Seligman - Intel Corp.
 Authors: Dmitry Korchemny - Intel Corp.
Erik Seligman - Intel Corp.
Laurence Bisht - Intel Corp.
1P.2PSL/SVA Assertions In Spice
 
 Speaker: Donald J. O'Riordan - Cadence Design Systems, Inc.
 Authors: Donald J. O'Riordan - Cadence Design Systems, Inc.
Prabal K. Bhattacharya - Cadence Design Systems, Inc.
1P.3The Missing Link: The Testbench to DUT Connection
 
 Speaker: Dave Rich - Mentor Graphics Corp.
 Author: Dave Rich - Mentor Graphics Corp.
1P.4Blending Multiple Metrics from Multiple Verification Engines for Improved Productivity
 
 Speaker: Thomas Ellis - Mentor Graphics Corp.
 Authors: Darren Galpin - Infineon Technologies AG
Darron K. May - Mentor Graphics Corp.
Thomas Ellis - Mentor Graphics Corp.
1P.5Chef’s Special – An Efficient Verification Recipe for Maximizing Productivity While Using a Third Party Verification IP
 
 Speaker: Varun Sundaran - Synopsys, Inc.
 Authors: Bhavik M. Vyas - Marseille Networks, Inc.
Abhisek Verma - Synopsys, Inc.
Amit Sharma - Synopsys, Inc.
Varun Sundaran - Synopsys, Inc.
1P.6Efficient Distribution of Video Frames to Achieve Better Throughput
 
 Speaker: Kiran Maiya - Synopsys, Inc.
 Authors: Kiran Maiya - Synopsys, Inc.
Suruchi Jain - Marseille Networks, Inc.
Bhavik M. Vyas - Marseille Networks, Inc.
1P.7Keeping Score - Techniques for Scoreboard Design and Development
 
 Speaker: Gordon Allan - Mentor Graphics Corp.
 Author: Gordon Allan - Mentor Graphics Corp.
1P.8Creating a Complete Low Power Verification Strategy Using the Common Power Format and UVM
 
 Speaker: Robert J. Meyer - Medtronic, Inc.
 Authors: Robert J. Meyer - Medtronic, Inc.
Joel B. Artmann - Medtronic, Inc.
1P.9An Integrated Framework for Power-Aware Verification
 
 Speaker: Bhaskar Pal - Synopsys, Inc.
 Authors: Harsh Chilwal - Synopsys, Inc.
Manish Jain - Synopsys, Inc.
Bhaskar Pal - Synopsys, Inc.
1P.10New Challenges in Verification of Mixed-Signal IP and SoC Design
 
 Speaker: Qi Wang - Cadence Design Systems, Inc.
 Authors: Luke Lang - Cadence Design Systems, Inc.
Christina Chu - Cadence Design Systems, Inc.
Qi Wang - Cadence Design Systems, Inc.
1P.11Random Stability - Don't Leave it to Chance!
 
 Speaker: Rich Edelman - Mentor Graphics Corp.
 Authors: Avidan Efody - Mentor Graphics Corp.
Rich Edelman - Mentor Graphics Corp.